Science

EEL3003L-Section #0002

Introduction to EE

Lab # 2

DC Circuits II:

KCL, KVL, Series and Parallel Resistive Networks

Written by: John Flores

Lab Instructor:

Muhammad Usama Usman

Lab performed date: 1/31/2017

Overview

1. Objective:

In this lab we are going to analyze electric circuits, especially we are going to focus on the principles of conservation of electric power by using KCL and KVL laws. We are going to examine series, parallel and series-parallel resistive circuits in order to have a better understanding of the laws. The objective of this lab is also to get familiarized with the parameters of voltage divider, current divider and the Wheatstone bridge.

1. Equipment:

• Analog Discovery with the 2 x15 colored fly-wires
• Bread Board
• Resistor of Different Values including the unknown resistor Rx

1. Procedure:

Part A: Voltage Divider Design

1. Determine the proper resistance R3 that absorbs 50% of the power delivered by Vs
2. In order to determine R3 the sum of the first two resistors were taken in order to determine what R3 should equal to in order for it to absorb 50% of the power delivered by Vs
3. Build the circuit shown in Figure 2.
4. Make the following connections between the Analog Discovery pins and the nodes on the board: • 1 – WaveGen1, W1 (Solid Yellow Line) • 1 – Scope Channel, 1+ (Solid Orange) • 0 – Ground (Black) • 2 – Scope Channel, 1- (Striped Orange)
5. Activate the Digilent Waveforms button which would display a window (Digilent WaveForms 1) as shown in Figure 3 below. The first step is to adjust the WaveGen. Click on the WaveGen button and set the arbitrary waveform generator to generate a DC voltage of amplitude 2 volts and 0 offset.
6. After making the adjustments on wave generator click the Run AWG1
7. To observe the output, activate the voltmeter by clicking on the Voltmeter under the More Instruments tab.
8.  Record the voltage across the resistor R1 and fill in Table 2 by making the relevant measurement across all the three resistors.
9. The obtained measurements should be included in the lab report. 9.
10. Perform the pertinent calculations based on the measured data to complete the table.

Part B: Current Divider Design

1. Determine the proper resistances for R1 and R2 such that they absorb 20% and 30% of the power delivered by the voltage source Vs, respectively. Detailed analysis and calculations need to be included in the lab report.

2. Build the circuit shown in Figure 4 on the bread board.

3. Make the following connections between the Analog Discovery pins and the nodes on the board: • 1 – WaveGen1, W1 (Solid Yellow Line) • 1 – Scope Channel, 1+ (Solid Orange) • 0 – Scope Channel, 1- (Striped Orange) • 0 – Ground (Black)